Generalized Formulation of Steady-State Equivalent Circuit Models of Grid-Forming Inverters
30 Aug 2021
Vinicius C. Cunha, Taehyung Kim, Nicholas Barry, Piyapath Siratarnsophon, Surya Santoso, Walmir Freitas, Deepak Ramasubramanian, and Roger C. Dugan
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This work proposes positive- and negative-sequence equivalent circuits of grid-forming inverters for steady-state analysis. The proposed models are especially attractive for performing long-duration voltage regulation analysis and short-circuit studies involving grid-forming inverters. Our proposed equivalent circuit models are based on the inverter's voltage and current control loops in the αβ and dq frames. For this reason, they operate according to prescribed control functions and specified impedances (i.e., filter impedance, current limiter block, virtual admittance block, and PI/PR controller block). The equivalent circuit model accuracy is validated by comparing system steady-state voltage and current responses obtained by detailed time-domain models in PSCAD/EMTDC to those by the equivalent circuit models implemented in steady-state load flow program (e.g., OpenDSS). Two distinct control structures implemented in the αβ and dq frames are used for the validation. Single line-to-ground and line-to-line-to-ground faults are simulated in a small islanded microgrid as well as the IEEE 34-node test feeder. Fault impedances varying from 0 to 5 ohms are simulated. We show that the equivalent models precisely replicate the steady-state response of the detailed time-domain models.